True-sharing data structure

Implementing cache-line-aware data structures in C++

This easy coding problem tests whether you understand false sharing and how to eliminate it through careful memory layout. It is common in low-latency trading systems where two threads operate on independent counters or flags that must not interfere with each other's cache performance.

The core challenge is to ensure that two integral member variables sit on separate cache lines, so that when one thread writes to a member, the other thread's read does not trigger an expensive cache-line invalidation. This requires knowledge of cache-line size, alignment semantics, and how to use compiler features or standard library utilities to pad and align struct members correctly. The solution must be portable and not hard-code assumptions about cache architecture.

• Cache-line size detection and portability
• Alignment and padding in C++ struct layout
• Standard utilities for enforcing alignment constraints
• Integral type constraints via templates