Hardware Engineering Educator
Job Description
We're looking for a Hardware Engineering professional with deep experience using SystemVerilog to build out our hardware engineering-related progress trees (roadmaps).
Several images of an example roadmap is included at the end of this post.
We're open to your various roadmaps to start. Some ideas from us include:
Beginner SystemVerilog
Beginner FPGA Development
Working on these roadmaps would involve:
Collecting paid (e.g. books) or free (e.g. websites) learning resources, and structuring them in a way that allows our users to feel meaningful progression in their learning.
Break said resources down into digestible sections to save users time, by allowing them to focus on exactly what they need.
Build nodes and grouping of nodes that represent progressions in learning, from one grouping to another.
Develop questions and coding problems that reinforce the user's learning, allowing them to solidify the concepts they've read about.
Utilizing the getcracked.io interface and Contributor Portal to edit and add resources, questions, problems, and descriptions to nodes and groups of nodes in the progress tree.
This is a remote role.
Ideal Candidate
This is a wishlist, not a hard set of requirements, so if you don't meet one exactly, don't fret!
A Bachelor’s degree in CE, EE, CS, or related technical field.
Experience designing, coding, testing, and verifying FPGAs.
Experience coding in SystemVerilog.
Experience with RTL synthesis, writing timing, area, and other relevant constraints.
Experience with digital simulators and self-checking test benches.
Experience in quantitative trading is not a must-have, but definitely a plus.
Most importantly, you have a history of teaching, and understanding how to breakdown information into digestible chunks. Knowing is one thing, being able to communicate what you know is another.
Compensation
This heavily depends on your experience, but we're targetting between $50 to $75 USD per hour, open to discussion. Payable via PayPal or cryptocurrency (Monero or USDc).
Involvement
The ideal candidate can commit at least 7 hours a week to these initiatives.
Example Roadmap
Roadmaps are consumed top to bottom, left to right.
Similar concepts are grouped together, where each node is a topic with one or more resources attached. Each resource has a section specification to hone the reader to a specific chapter of relavance.
A user can click on a node and see the topic's description, all the corresponding resources, questions, and problems, and track progress.
We have a super easy-to-use interface that allows you to edit all of this information in-place (Edit Mode, available for contributors).
