3 Cache Misses

Understanding cache miss categories in computer architecture

This question tests foundational knowledge of cache memory behaviour — a core topic in systems programming and performance engineering. Quant firms and HFT shops care about this because latency-critical code depends on predictable memory access patterns, and understanding why caches fail is essential for writing performant C++ and low-level systems code.

The question asks you to classify and name the primary categories of cache misses. A complete answer requires distinguishing between misses that arise from different root causes: whether the data has never been accessed before, whether the cache isn't large enough, or whether access patterns cause data to be evicted prematurely. This taxonomy helps engineers diagnose performance bottlenecks and reason about trade-offs in cache design.

• Memory hierarchy and access patterns
• Capacity and associativity constraints
• Cache replacement policies and eviction
• Temporal and spatial locality