TLB Switch

What this TLB context-switch interview question tests

This is an easy computer-architecture question that probes understanding of how modern processors manage the Translation Lookaside Buffer during process preemption. It asks you to reason about the trade-offs between flushing the TLB entirely versus preserving process state across context switches — a practical concern that affects both correctness and performance in systems software.

The question rewards knowledge of how operating systems and CPU cache hierarchies interact. When a scheduler preempts a running process, the TLB contains virtual-to-physical address mappings specific to that process. A naive approach flushes everything; a better approach preserves the mappings so they can be restored when the process resumes, avoiding the latency cost of rebuilding the cache. Understanding this mechanism is useful for anyone working on systems, performance optimization, or low-level software at quantitative trading firms or financial infrastructure teams.

• Virtual memory and address translation
• TLB organization and replacement policy
• Process context and scheduler behavior
• CPU cache coherence and performance