Understanding cache affinity in computer architecture
This easy-level question tests whether you can define and explain a fundamental concept in computer architecture. Cache affinity appears regularly in systems design and low-latency trading interviews, where understanding how data and computation interact with CPU caches directly affects performance.
The question asks you to articulate what happens when a program's memory access patterns align well—or poorly—with the structure and behaviour of the machine's cache hierarchy. Interviewers use this to gauge whether you think about hardware realities when designing algorithms and data structures, not just Big O complexity.
- Spatial and temporal locality
- Cache line size and alignment
- NUMA effects in multi-socket systems